Over 15 years experience in areas of ASIC design and verification,
EDA tools, and training for ASIC design and EDA tools with
a track record of developing and delivering presentations
that cultivate talent for high productivity. Demonstrated
ability to make technical knowledge accessible at any level,
from novice to expert, in both written and oral formats. Equally
successful working in groups or independently with a reputation
for meeting deadlines and managing a classroom and satisfying
SOFTWARE , Santa Clara, CA 2010
Reviewing and updating user guides and reference manual for
Writing Perl scripts for consolidating various sources of user
NET , San Jose, CA 2010
Volunteer Coach and Instructor
coach for Introduction to Computing class.
instructor for Windows Vista class.
Cupertino, CA 2008 – 2010
technology infrastructure, provide technical support for presenters,
send mebership invitations.
DESIGN AUTOMATION, San Jose, CA 2006 – 2008
Senior Technical Trainer
lab-based training courses for employee and customer engineers,
reducing user’s adaptation time for product upgrades and improving
consistently high ratings from clients in delivery of hands-on
training of the company’s EDA technology.
front end and back end lectures from Blast to Talus (a major
software revision) on schedule.
lab exercises and instruction books for both front & back
end courses updating course content and improving relevancy.
introductory material from front end and back end courses
into a single book streamlining course update procedures.
SANDISK CORPORATION, Sunnyvale, CA 2006
ASIC Verification and Test Methodology (Six month contract)
RTL design rule checking, clock domain analysis, and test
methodology development for complex flash memory interface
UPEK CORPORATION, Emeryville, CA 2005
Technical Training Course Developer (Three month contract)
training course for customers and new employees regarding
fingerprint scanning technology.
CORPORATION, Milpitas, CA 1990-2005
Staff Engineer / Technical Trainer and Course Developer
needs and created alternatives to full training courses where
appropriate (e.g. Quick Reference Cards, enhanced documentation),
saving costs for course development.
Implemented, maintained, and updated 1500 line Perl script for web-based
course delivery, saving at least $50K in 3rd-party software
web based training infrastructure which drastically reduced
time and money spent on travel and web-page maintenance.
and delivered training courses for ASIC design methodology
and proprietary and third-party EDA tools, improving productivity
and shortening design cycles
Created lab exercises which were also used for de-facto secondary
software QA as labs were being updated discovering numerous bugs prior to new software release.
and insight gained from training and applications roles (see
below) to support groups developing logic design rule checks
and design for test methodologies.
Recorded and edited dozens of short on-line lectures and software
demos with and without pre-written scripts.
Wrote scripts and/or acted as on-screen MC for several training videos.
Comfortable on-camera and with use of teleprompter.
BSEE with emphasis on
digital circuit design, Worcester Polytechnic Institute, Worcester, MA
Process Monitor Circuit (implemented on all LSI Logic ASIC
designs for several years in the 1990s)
A method of protecting intellectual property in IC design
Semiconductor package electrostatic discharge damage protection
tools (e.g. Synopsys Design Compiler, Jupiter, Verdi, NC
Verilog, Axiom, Mentor FastScan, Magma Blast and Talus,
etc.) Learns new EDA tools very quickly.
less experienced designers, both customers and co-workers
and VHDL hardware design languages
page development tools, including DreamWeaver, PowerPoint,
for web servers
ADDENDUM – BILL GASCOYNE
Design Flow Verification, LSI Logic, Milpitas,
- Performed verification and evaluation
of various tools used in ASIC design.
- Used Synopsys Physical Compiler
to evaluate and support multiple multi-million gate designs
(floorplanning, pre-placement, congestion evaluation)
On-site Support Engineer, at IBM Research, Yorktown Heights, NY
- Provided on-site support for complex
LSI Logic ASIC design destined for teraflop research computer
to be used in quantum chromo-dynamic calculations.
Applications Engineer, LSI Logic, Milpitas, CA
- Provided direct customer design
support for 200 ASIC designs.
- Provided factory support for Midwest design centers.
- On self-initiative, created the
company’s first automated ASIC signoff procedure program.